1. Field of the Invention
The present invention relates to a structure for a Thin Film Transistor Liquid Crystal Display (TFT-LCD) Devise, and more particularly, to a structure for a TFT-LCD in which a thin film transistor channel structure is changed to increase a channel width and a process margin, thereby preventing a degradation of its characteristics.
2. Discussion of the Related Art
FIGS. 1A through 1E generally illustrate a sequential fabrication process of a general thin film transistor substrate for a liquid crystal display (LCD) device.
As shown in the drawings, the process of fabricating a general thin film transistor LCD includes the steps of: depositing a metal on the entire surface of an upper portion of a glass substrate 1, and forming a gate line/electrode 2 at one upper portion of the glass substrate 1 by patterning the metal by a photo-etching process (FIG. 1A); sequentially depositing a gate insulation film 3 and amorphous silicon on the entire upper surface of the resulting structure, and patterning the amorphous silicon to form an active region above the gate insulation film 3 over the gate line/electrode 2 to overlap the sides of the gate electrode 2 (FIG. 1B); depositing a metal over the entire surface of the resulting structure, and patterning the metal to form a source electrode 5 and a drain electrode 6 spaced apart from each other by a region over a central portion of the active region 4 (FIG. 1C); depositing a passivation film 7 over the entire surface of the resulting structure, and forming a contact hole in the passivation film 7 to expose an upper surface of the drain electrode 6 (FIG. 1D); depositing a transparent conductive material such as Indium Tin Oxide (ITO) over the entire upper surface of the resulting structure, patterning the ITO so as to be connected to the exposed surface of the drain electrode 6 so as to form a pixel electrode 8 positioned at an upper portion of the gate insulation film 3 where no active region 4 has been formed.
A method for fabricating a lower substrate of the thin film transistor LCD constructed as described above will now be explained.
First, as shown in FIG. 1A, the metal is deposited at the entire upper surface of the glass substrate 1 and patterned through a photo-etching process, to form the gate line/electrode 2 the surface of the glass substrate 1.
Next, as shown in FIG. 1B, the gate insulation film 3 is deposited over the resulting structure, and the amorphous silicon is deposited on the gate insulation film 3.
And then, the amorphous silicon is patterned through the photo-etching process to form the active region 4 over the gate line/electrode 2 and on the gate insulation film 3.
And, as shown in FIG. 1C, the metal is deposited on the entire upper surface of the resulting structure. The deposited metal is then patterned by a photo-etching process to form the source electrode 5 and the drain electrode 6, which are spaced apart from each other by a channel region over a central portion of the active region 4 and overlapping the sides of the active region 4, above the gate insulation film 3. Thus, a thin film transistor (TFT) including the gate line/electrode 2, the active region 4, the source electrode 5, and the drain electrode 6 is formed.
Next, as shown in FIG. 1D, the passivation film 7 is deposited on the entire upper surface of the resulting structure, and then a contact hole 10 is formed in the passivation film 7 through the photo-etching process, thereby exposing a portion the drain electrode 6.
Then, as shown in FIG. 1E, an ITO, a transparent conductor, is deposited over the entire upper surface of the resulting structure and patterned by the photo-etching process so that the pixel electrode 8 is formed over a part of the drain electrode 6 and the contact hole 10 and also in a flat area where the glass substrate 1, the gate insulation film 3 and the passivation film 7 are sequentially deposited adjacent to the active region 4 and the TFT. The pixel electrode 8 is connected to the drain electrode 6 through the contact hole 10 in the passivation film 7.
FIG. 2 shows a structure of the TFT-LCD in accordance with a conventional art.
As shown in FIG. 2, the TFT-LCD includes the gate line/electrode 2 formed horizontally in the context of the figures; a data line 9 formed vertically in the context of the figure and crossing the gate line/electrode 2; a source electrode 5 overlapping the gate line/electrode 2 at a central lower side of the gate line/electrode 2 in the context of the figure. The source electrode 5 perpendicularly extends from the data line 9 and includes an end portion that is parallel to the data line 9 so that the end portion parallel to the data line 9 overlaps the gate line/electrode 2. As shown, the TFT-LCD includes a drain electrode 6 overlapping the gate line/electrode 2 and spaced from a side of the source electrode 5 facing the drain electrode 6 to define a substantially ‘U’-shaped channel region. The TFT-LCD further includes a pixel electrode 8 connected to the drain electrode 6 and positioned at an inner side of a quadrangle formed by the data line 9 and the gate line/electrode 2.
The structure of the conventional TFT LCD constructed as described above will now be explained in detail.
First, the thin film transistor of the TFT LCD has the channel structure of ‘U’ shape, so that the ratio between the channel length and the channel width is high. As the ratio between the channel length and the channel width is great, mobility of electric charge moving through the channel becomes excellent, and a video signal applied through the data line 9 can be applied to the pixel electrode 8 connected to the drain electrode 6 with a relatively low voltage. In order to have the structure, the data line 9 is formed long and the source electrode 5 extends from the data line 9. The end of the extended portion of the source is bent to be parallel to the data line 9. The source electrode 5 and the data line 9 are substantially one, and in consideration of the fact that the data line 9 performs the same role as that of the source, the data line 9 and the source electrode 5 are formed to have the ‘U’ shape so as to form the U-shaped channel region with respect to the drain electrode 6.
The channel region is formed by the source electrode 5, the drain electrode 6 and the gate line/electrode 2. That is, as the drain electrode 6 overlaps the gate line/electrode 2 and positioned corresponding to the inner side of a ‘U’ shaped formed by the data line 9, the portion of the source electrode 5 perpendicular to the data line 9 and the end portion of the source electrode 5, so as to form the U-shaped channel.
As the channel region defined by the source electrode 5, the drain electrode 6 and the gate line/electrode 2 has the U-shape, the overall length of the channel is relatively increased.
However, a problem of the above structure is that the source electrode 5 extends in the horizontal direction from a portion of the data line 9 and the end portion of the extended portion is bent to be parallel to the data line 9. Thus, in order to overlap the entire source electrode 5 with the gate line/electrode 2, the gate line/electrode 2 should be wide, and accordingly, the numerical aperture of a display device (aperture ratio), i.e., the area for transmitting light, is reduced.
That is, in view of the characteristics of the thin film transistor display device, the thin film transistor region including the data line 9, the gate line/electrode 2, the source electrode 5, the drain electrode 6 and the active region 4 does not allow light to be transmitted, thus reducing the display area. Reducing the area of this “non-transmission region” makes better use of the light source, and thus there is better light efficiency of back light and characteristics of the display device such as a luminance characteristic are improved.
However, in the structure described above, the width of the gate line/electrode 2 is considerably increased, which reduces the area for transmitting light so that the characteristics of the display device are degraded.
In addition, if the gate line/electrode 2 or the drain electrode 6 are moved left or right or up or down with respect to each other, for example, unexpectedly due to a process change or the like, the gate line/electrode 2 and the drain electrode 6 may not overlap one another, and in such a case, the thin film transistor may not operate.
Even if such a serious position change does not occur, if the actual area that the drain electrode 6 and the gate line/electrode 2 are overlapped is changed, the parasitic capacitance value between the gate line/electrode 2 and the drain electrode 6 may be changed. Thus, the characteristics of the device would be changed and an accurate operation of the display device is hardly expected.
In consideration of the fact that the capacitance varies according to the position change of each region forming the thin film transistor, a structure for maintaining the same capacitance between the gate and drain regardless of the position change of each region has been proposed as shown in FIG. 3.
FIG. 3 illustrates the structure in which a capacitance between the gate drain and the gate source is not changed even if the positions of each region of the thin film transistor LCD are changed.
As shown in FIG. 3, the structure for a thin transistor LCD includes a data line 9 extending vertically in the context of the figure; a gate line/electrode 2 extending horizontally in the context of the figures which is overlapped with a predetermined area of the data line 9. A source electrode 5 and a drain electrode 6 are in parallel to the data line 9 and wider than the width of the gate line/electrode 2. A pixel electrode, a part of which is connected to the drain electrode 6, is positioned at a central portion of a pixel region formed by the data line 9 and the gate line/electrode 2.
The structure of the thin film transistor LCD constructed as described above will now be explained in more detail.
The structure as shown in FIG. 6 is featured in that since the area where the gate and the source or the gate and the drain are overlapped is not changed according to the position change of at the upper and lower portion of the right and left portion of the gate line/electrode 2, so that its capacitance is constant.
In order to implement the structure, the data line 9 is positioned vertically long with a certain width, and the gate line/electrode 2 is also positioned horizontally long with a certain width, having the constant area that the gate line/electrode 2 and the data line 9 are overlapped. The overlapped portion serves as the source electrode 5.
Even if the gate line/electrode 2 or the data line 9 are moved vertically or horizontally to be formed due to a change in a process, the overlapped area is constantly uniform, and thus, there is no capacitance change between the source and the gate.
In addition, like the data line 9, the drain electrode 6 is also disposed extends vertically in the context of the figures, so that a constantly uniform area is overlapped with the gate line/electrode 2. Thus, a constant capacitance is formed between the drain electrode 6 and the gate line/electrode 2 regardless of the position of the gate line/electrode 2 with respect to the drain electrode 6.
As a matter of course, the data line 9 is commonly used between pixels and the drain electrode 6 is independently positioned in each pixel. In this case, if the position of the gate line/electrode 2 is changed excessively with respect to the drain electrode 6 due to the difference of the length, the drain electrode 6 and the gate line/electrode 2 may be overlap. The amount of such a position change could be so much as not to use the entire display device. Thus, the margin space allowed in manufacturing process should be considerably increased compared to the embodiment of FIG. 2 to ensure placement of the drain electrode 6 to overlap the gate line/electrode 2 sufficiently. However, in such a structure, the length of the channel is the same as the width of the gate line/electrode 2, i.e., the width of the channel is no longer than the width of the gate line/electrode 2. Thus, in order to obtain a greater channel length, the width of the gate line/electrode 2 needs to be increased. Then, however, the light efficiency, a aperture ratio and other characteristics of the display device are degraded.
As above mentioned, the conventional structure for a thin film transistor LCD has problems that the width of the gate electrode must be increased to widen the width of the channel, the light efficiency is degraded due to the increase in the width of the gate electrode, and the aperture efficiency of the display device is reduced thus degrading the luminance characteristic. In the U-shaped structure for remarkably increasing the width of the channel, since the allowance of the process margin is low, even though the position of each region forming the thin film transistor LCD is a bit changed, the capacitance between the source and the drain is changed causing each pixel to have a different operation characteristic, degrading the reliability of the entire display device. In addition, the driving the LCD device described above is difficult because of the variance in capacitance from pixel region to pixel region, and the characteristic of the display device is deteriorated.